Ansys SIWave

Ansys SIwave - Enterprise Signal Integrity Analysis for PCB Design

Ansys SIwave is signal integrity, power integrity and EMI software for PCBs and electronic packages. It identifies the issues that cause high-speed boards to fail in the lab: reflections and crosstalk on fast channels, voltage drop and noise on the power delivery network, and emissions that fail EMC testing.

Because SIwave reads board and package layouts directly, it fits within the layout cycle. Designs can be verified while they are still being routed, rather than after the first boards return.

Ansys SIwave 2025 R2

• SIwave Far Field in HFSS 3D Layout: run SIwave far-field simulation directly in HFSS 3D Layout.
• Q3D DC solver for CPA: a Q3D DC solver option for the CPA-Q3D flow.
• DCIR power tree and IBIS-AMI: DCIR power tree enhancements and IBIS-AMI support in the SI wizard.

Read more: What's New in Ansys Electronics 2025 R2 (PDF)

Ansys Electronics Enterprise

The complete Ansys electronics portfolio in a single-user licence, including the full SIwave toolset: EMI scanning, HFSS regions and the signal integrity solvers.

Ansys Electronics Premium SIwave

The SIwave DC and power integrity solvers, ECAD and MCAD modelling and translation, and advanced circuit analysis, with Electronics Pro 2D included.

Ansys Electronics Pro 2D

2D low-frequency electromagnetic and electromechanical analysis, 2D parameter extraction, RF interference analysis and circuit simulation, including Maxwell 2D, RMxprt, PExprt and the 2D Extractor.

SerDes, DDR and Memory Bus Signal Integrity

SIwave extracts multi-gigabit SerDes channels and memory buses with S-parameters and SPICE models, and links them into circuit simulation with IBIS-AMI. A DDR wizard supports virtual compliance checks, and channel compliance for standards such as USB-C and IEEE 802.3 is available through SPISim technology.

Power Delivery Network Extraction and DC IR Drop

Full-wave extraction of the complete power delivery network verifies noise margins, alongside DC IR drop and current density. This is where decoupling capacitor strategies are validated or reduced. RLCG extraction also covers packages, busbars and power converters.

EMI Design Rule Checks and Electrothermal Analysis

EMI Scanner applies configurable design rule checks automatically, and near- and far-field analysis anticipates EMC test results. Power maps pass to Ansys Icepak and Ansys Mechanical for linked electrical, thermal and stress analysis before production.

Common SI and PI Consultation Topics

• DDR memory interfaces: signal quality and timing margins.
• Power delivery: voltage drop and decoupling on boards and packages.
• High-speed serial links: channel loss and crosstalk for interfaces such as PCIe, USB and Ethernet.
• EMI pre-compliance: board-level emission risk before lab testing.

Have a project outside this list? Send us the specification. Where a study needs specialist knowledge, we draw on our wider Ansys partner network.

Related Products

• Ansys HFSS: full 3D electromagnetic simulation, for structures too complex for a layout-based solver.
• Ansys Icepak: board and system thermal analysis using SIwave power maps.
• Ansys Electronics Enterprise: includes the complete SIwave toolset.

Ansys SIwave FAQ

Does SIwave support DDR design?

Yes. DDR interfaces are one of its most common applications, for both signal and power integrity, with a dedicated DDR wizard.

Related CADIT Training

• EMHF 102 - Ansys SIwave Introduction Training
• EMHF 203 - Ansys SIwave Advanced Signal & Power Integrity Training
• EMHF 201 - Ansys HFSS EMI/EMC Simulation (CISPR 25) Training

Oct ’26 update by the CADIT Electronics Team.